diff options
| author | Tianhao Wang <shrik3@mailbox.org> | 2024-06-06 02:18:51 +0200 |
|---|---|---|
| committer | Tianhao Wang <shrik3@mailbox.org> | 2024-06-11 15:17:14 +0200 |
| commit | 1a0d4d56032b0326e415b8d450c601afa63ecd32 (patch) | |
| tree | c5d97b9b70f0a244e59bc05edee111e3d41d3cd2 /src/arch/x86_64 | |
| parent | d495a1745c83a8186bf1c6c531177887dd245436 (diff) | |
chore: format asm code
mostly fixing identation and tabstop:
0. line width is 80 chars
1. tab is 8 chars wide (tabstop = 8)
2. leading indentation and only leading indentations are __hard_tabs__
3. non-leading tabs are expanded into spaces
4. instrs are always indented 1 level, and only 1 level
5. the first operand (if any) starts at the next tabstop after the
instruction, but the tab inbetween is expanded to spaces (3)
Signed-off-by: Tianhao Wang <shrik3@mailbox.org>
Diffstat (limited to 'src/arch/x86_64')
| -rw-r--r-- | src/arch/x86_64/asm/misc.s | 8 | ||||
| -rw-r--r-- | src/arch/x86_64/asm/vectors.s | 68 |
2 files changed, 36 insertions, 40 deletions
diff --git a/src/arch/x86_64/asm/misc.s b/src/arch/x86_64/asm/misc.s index fc5aa90..532aacd 100644 --- a/src/arch/x86_64/asm/misc.s +++ b/src/arch/x86_64/asm/misc.s @@ -1,11 +1,7 @@ ; place for misc code, before they find better places to live.. - [GLOBAL _delay] - [SECTION .text] - _delay: - jmp .dummy + jmp .dummy .dummy: - ret - + ret diff --git a/src/arch/x86_64/asm/vectors.s b/src/arch/x86_64/asm/vectors.s index cc7a7b7..8b4992e 100644 --- a/src/arch/x86_64/asm/vectors.s +++ b/src/arch/x86_64/asm/vectors.s @@ -11,29 +11,29 @@ ; TODO: use a interrupt stack instead of the current stack. idt: ; reserve space for 256x idt entries (16 bytes each) -resb 16 * 256 + resb 16 * 256 [SECTION .data.idt_descr] idt_descr: - dw 256*8 - 1 ; 256 entries - dq idt + dw 256*8 - 1 ; 256 entries + dq idt [SECTION .text.vectors] %macro trap_without_err 1 align 16 vector_%1: - push 0 - push rax - mov al, %1 - jmp vector_body + push 0 + push rax + mov al, %1 + jmp vector_body %endmacro %macro trap_with_err 1 align 16 vector_e_%1: - push rax - mov al, %1 - jmp vector_body + push rax + mov al, %1 + jmp vector_body %endmacro vectors_start: @@ -84,38 +84,38 @@ vector_body: ; GCC expects the direction flag to be 0 cld ; save volatile registers - push rcx - push rdx - push rdi - push rsi - push r8 - push r9 - push r10 - push r11 + push rcx + push rdx + push rdi + push rsi + push r8 + push r9 + push r10 + push r11 ; the generated wrapper only gives us 8 bits, mask the rest - and rax, 0xff + and rax, 0xff ; the first parameter is the interrupt (exception) number - mov rdi, rax - ; the second parameter is a pointer to the trap frame - mov rsi, rsp + mov rdi, rax + ; the second parameter is a pointer to the trap frame + mov rsi, rsp ; For a long jump, we need to put the (large) address in an register ; here reusing one of the caller clobbered regs (pushed above) - mov r11, trap_gate - call r11 + mov r11, trap_gate + call r11 ; restore volatile registers - pop r11 - pop r10 - pop r9 - pop r8 - pop rsi - pop rdi - pop rdx - pop rcx + pop r11 + pop r10 + pop r9 + pop r8 + pop rsi + pop rdi + pop rdx + pop rcx - pop rax + pop rax ; "pop" the error code - add rsp, 8 + add rsp, 8 ; done iretq |