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authorTianhao Wang <wth@riseup.net>2024-02-25 19:13:04 +0100
committerTianhao Wang <shrik3@mailbox.org>2024-06-11 15:13:39 +0200
commitb31c08a010d5113edb549dc6dda2f726f282277e (patch)
tree73345ebe86dba44879b160674c503a1af3cd4b0e
parent798501b4b641e4ee7f329b541ca5a52d1155191f (diff)
add docs
-rw-r--r--docs/x86_paging.txt45
1 files changed, 45 insertions, 0 deletions
diff --git a/docs/x86_paging.txt b/docs/x86_paging.txt
new file mode 100644
index 0000000..3d6069a
--- /dev/null
+++ b/docs/x86_paging.txt
@@ -0,0 +1,45 @@
+
+
++------------+
+| PML4 Entry |
++------------+
+
+
+0 PRESENT
+1 R/W (1 == writable)
+2 U/S (1 == user accessable)
+3 PWD (write-through)
+4 PCD (cache disable)
+5 A (Accessed)
+6 IGN
+7 RES0
+8:10 IGN
+11 R (ign, or restart for HLAT paging)
+M-1:12 next level table PA[M:12]
+51:M RES0
+62:52 IGN
+63 XD (execute disable (if EFER.NXE=1)) otherwise RES0
+
+
++------------+
+| PDPT ENtry | (level 3) with 1GiB Page (requires PS=1)
++------------+
+
+0 PRESENT
+1 R/W (1 == writable)
+2 U/S (1 == user accessable)
+3 PWD (write-through)
+4 PCD (cache disable)
+5 A (Accessed)
+6 D (Dirty)
+7 PS (must be 1)*
+8 G (Global, if CR4.PGE=1), otherwise INR
+10:9 IGR
+11 R (ign, or restart for HLAT paging)
+12 PAT (indirectly determines memory type)
+29:13 RES0
+M-1:30 PA[M-1:30]
+51:M RES0
+52:58 IGN
+59:62 Protection key
+63 XD (execute disable (if EFER.NXE=1)) otherwise RES0