diff options
| author | Tianhao Wang <shrik3@riseup.net> | 2023-03-14 10:47:25 +0100 |
|---|---|---|
| committer | Tianhao Wang <shrik3@riseup.net> | 2023-03-14 10:47:25 +0100 |
| commit | 383c203d77404b4f74723d7a89be691744f41c25 (patch) | |
| tree | 1061f01ed975a2c6b37015567b27cccac9f9f87b | |
| parent | 4eae38a6ce9110a155715575adcf12bdf45703cb (diff) | |
add delay between IOs
| -rw-r--r-- | src/arch/x86_64/asm/misc.s | 11 | ||||
| -rw-r--r-- | src/arch/x86_64/misc.rs | 17 | ||||
| -rw-r--r-- | src/arch/x86_64/mod.rs | 1 | ||||
| -rw-r--r-- | src/machine/cgascr.rs | 5 |
4 files changed, 34 insertions, 0 deletions
diff --git a/src/arch/x86_64/asm/misc.s b/src/arch/x86_64/asm/misc.s new file mode 100644 index 0000000..fc5aa90 --- /dev/null +++ b/src/arch/x86_64/asm/misc.s @@ -0,0 +1,11 @@ +; place for misc code, before they find better places to live.. + +[GLOBAL _delay] + +[SECTION .text] + +_delay: + jmp .dummy +.dummy: + ret + diff --git a/src/arch/x86_64/misc.rs b/src/arch/x86_64/misc.rs new file mode 100644 index 0000000..c007d99 --- /dev/null +++ b/src/arch/x86_64/misc.rs @@ -0,0 +1,17 @@ +// wrappers for misc. architectural code +// before they find better place to go. +// asm code goes to asm/misc.s + +extern "C" { + fn _delay(); +} + +#[inline(always)] + +// delays for several cycles. Used to fill sequantial IO commands +// (for devices to react) +pub fn delay() { + unsafe { + _delay(); + } +} diff --git a/src/arch/x86_64/mod.rs b/src/arch/x86_64/mod.rs index ef06437..f48c7fd 100644 --- a/src/arch/x86_64/mod.rs +++ b/src/arch/x86_64/mod.rs @@ -3,3 +3,4 @@ pub mod pic; pub mod pit; pub mod plugbox; pub mod cpu; +pub mod misc; diff --git a/src/machine/cgascr.rs b/src/machine/cgascr.rs index 2748e67..dd019d7 100644 --- a/src/machine/cgascr.rs +++ b/src/machine/cgascr.rs @@ -1,4 +1,5 @@ use crate::arch::x86_64::io_port::*; +use crate::arch::x86_64::misc::*; const CGA_BUFFER_START:*mut u8 = 0xb8000 as *mut u8; const IR_PORT:u16 = 0x3d4; @@ -44,10 +45,14 @@ impl CGAScreen{ // set lower byte outb(IR_PORT, 15 as u8); + delay(); outb(DR_PORT, offset as u8); + delay(); // set higher byte outb(IR_PORT, 14 as u8); + delay(); outb(DR_PORT, (offset >> 8) as u8); + delay(); } |
