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| author | Tianhao Wang <shrik3@mailbox.org> | 2024-04-18 04:49:53 +0200 |
|---|---|---|
| committer | Tianhao Wang <shrik3@mailbox.org> | 2024-06-11 15:16:34 +0200 |
| commit | 26c7262747930cebbd20dd7194f1245798bacdf6 (patch) | |
| tree | 128e1210f056d125300ca4a08110bddb242b0f0e | |
| parent | 18c798222a9a28f704a191e5e16b93c873a21ab2 (diff) | |
rename wraper -> vector
| -rw-r--r-- | src/arch/x86_64/asm/vectors.s | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/x86_64/asm/vectors.s b/src/arch/x86_64/asm/vectors.s index 2798032..d5a2357 100644 --- a/src/arch/x86_64/asm/vectors.s +++ b/src/arch/x86_64/asm/vectors.s @@ -24,14 +24,14 @@ idt_descr: ; if the vector has to be modified into more than 16 bytes, ; arch::x86_64:: interrupt::_idt_init() must be modified accordingly [SECTION .reserved.vectors] -%macro wrapper 1 +%macro vector 1 align 16 -wrapper_%1: +vector_%1: push rbp mov rbp, rsp push rax mov al, %1 - jmp wrapper_body + jmp vector_body %endmacro ; automatic generation of 256 interrupt-handling routines, based on above macro @@ -39,12 +39,12 @@ wrapper_%1: vectors_start: %assign i 0 %rep 256 - wrapper i + vector i %assign i i+1 %endrep ; common handler body -wrapper_body: +vector_body: ; GCC expects the direction flag to be 0 cld ; save volatile registers @@ -73,7 +73,7 @@ wrapper_body: pop rdx pop rcx - ; ... also those from the wrapper + ; ... also those from the vector wrapper pop rax pop rbp |