From 5299d4ba95f5e6c3d8faa0cd7141cce9f710a24c Mon Sep 17 00:00:00 2001
From: Tianhao Wang <shrik3@mailbox.org>
Date: Wed, 17 Apr 2024 20:34:29 +0200
Subject: pic: initialize with rust code

---
 boot/startup-x86_64.s                 | 46 -----------------------------------
 src/arch/x86_64/interrupt/pic_8259.rs | 17 ++++++++++++-
 src/lib.rs                            |  7 +++---
 3 files changed, 20 insertions(+), 50 deletions(-)

diff --git a/boot/startup-x86_64.s b/boot/startup-x86_64.s
index 4c4cc21..9198a9f 100644
--- a/boot/startup-x86_64.s
+++ b/boot/startup-x86_64.s
@@ -187,7 +187,6 @@ clear_bss:
 
 	; initialize IDT and PICs
 	call   setup_idt
-	call   reprogram_pics
 
 	fninit         ; activate FPU
 
@@ -293,51 +292,6 @@ setup_idt:
 	lidt   [idt_descr]
 	ret
 
-;
-; Reprogram the PICs (programmable interrupt controllers) to have all 15
-; hardware interrupts in sequence in the IDT.
-;
-
-reprogram_pics:
-	mov    al, 0x11   ; ICW1: 8086 mode with ICW4
-	out    0x20, al
-	call   delay
-	out    0xa0, al
-	call   delay
-	mov    al, 0x20   ; ICW2 master: IRQ # offset (32)
-	out    0x21, al
-	call   delay
-	mov    al, 0x28   ; ICW2 slave: IRQ # offset (40)
-	out    0xa1, al
-	call   delay
-	mov    al, 0x04   ; ICW3 master: slaves with IRQs
-	out    0x21, al
-	call   delay
-	mov    al, 0x02   ; ICW3 slave: connected to master's IRQ2
-	out    0xa1, al
-	call   delay
-	mov    al, 0x03   ; ICW4: 8086 mode and automatic EOI
-	out    0x21, al
-	call   delay
-	out    0xa1, al
-	call   delay
-
-	mov    al, 0xff   ; Mask/disable hardware interrupts
-	out    0xa1, al   ; in the PICs. Only interrupt #2, which
-	call   delay      ; serves for cascading both PICs, is
-	mov    al, 0xfb   ; allowed.
-	out    0x21, al
-
-	ret
-
-;
-; Short delay for in/out instructions
-;
-
-delay:
-	jmp    .L2
-.L2:
-	ret
 
 [SECTION .data]
 
diff --git a/src/arch/x86_64/interrupt/pic_8259.rs b/src/arch/x86_64/interrupt/pic_8259.rs
index 894697c..969e8d1 100644
--- a/src/arch/x86_64/interrupt/pic_8259.rs
+++ b/src/arch/x86_64/interrupt/pic_8259.rs
@@ -1,7 +1,7 @@
 // For now, the PIC is stateless, i.e. we don'e need a struct for it.
 // Perhaps I need a Mutex handle later...
 use crate::arch::x86_64::io_port::*;
-
+use crate::arch::x86_64::misc::*;
 const IMR1: u16 = 0x21;
 const IMR2: u16 = 0xa1;
 const CTRL1: u16 = 0x20;
@@ -13,6 +13,21 @@ impl PicDeviceInt {
 	pub const KEYBOARD: u8 = 1;
 }
 
+// init must be called before interrupt is enabled.
+// TODO: turn pic into a singleton struct
+pub fn init() {
+	outb(0x20, 0x11);
+	outb(0xa0, 0x11);
+	outb(0x21, 0x20);
+	outb(0xa1, 0x28);
+	outb(0x21, 0x04);
+	outb(0xa1, 0x02);
+	outb(0x21, 0x03);
+	outb(0xa1, 0x03);
+	outb(0xa1, 0xff);
+	outb(0x21, 0xfb);
+}
+
 // 8-bit registers IMR1 and IMR2 registers hold interrupt masking bit 0~7 and
 // 8~15; if an interrupt is masked(set 1) on the respective bit, it's disabled
 pub fn allow(interrupt: u8) {
diff --git a/src/lib.rs b/src/lib.rs
index 897bbed..7f339c9 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -25,6 +25,10 @@ fn panic(info: &PanicInfo) -> ! {
 
 #[no_mangle]
 pub extern "C" fn _entry() -> ! {
+	// init code
+	pic_8259::init();
+	pic_8259::allow(PicDeviceInt::KEYBOARD);
+	interrupt::interrupt_enable();
 	io::set_attr(0x1f);
 	io::clear();
 	println!("--RuStuBs--");
@@ -32,9 +36,6 @@ pub extern "C" fn _entry() -> ! {
 	println!("   (,-.`._,'(       |\\`-/|");
 	println!("       `-.-' \\ )-`( , o o)");
 	println!("             `-    \\`_`\"'-");
-	// testing interrupt/PIC
-	// pic_8259::allow(PicDeviceInt::KEYBOARD);
-	// interrupt::interrupt_enable();
 	//
 	// busy loop query keyboard
 	let mut framemap = mm::pma::FMap::new();
-- 
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